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參數(shù)資料
| 型號： | MC34055DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 5-V Battery-Backup Supervisors for RAM Retention 8-MSOP -40 to 85 |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 280K |
| 代理商： | MC34055DW |
MC34055
3
MOTOROLA ANALOG IC DEVICE DATA
ELECTRICAL CHARACTERISTICS
(0
°
C
≤
TA
≤
70
°
C, VCC = 5.0 V, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
TX EN H
Input High Voltage (IIH = 200
μ
A)
Input Low Voltage (IIL = – 20
μ
A)
VIH
VIL
2.0
0
–
–
5.0
0.8
Vdc
RX DATA A/RX EN H/JABB H/CTL H
Output Voltage (See Load Circuits: CMOS Load Circuit)
High (IOH = –12 mA)
Low (IOL = +16 mA)
Vdc
VOH
VOL
3.7
–
–
–
–
0.5
RX DATA B
Output Voltage (See Load Circuits: ECL Load Circuit)
High:
@ 0
°
C
@ 25
°
C
@ 70
°
C
Low:
@ 0
°
C
@ 25
°
C
@ 70
°
C
Vdc
VOH
0.984 VCC– 0.923
0.984 VCC– 0.877
0.984 VCC– 0.825
0.750 VCC– 0.568
0.750 VCC– 0.550
0.750 VCC– 0.531
0.984 VCC– 0.763
0.984 VCC– 0.727
0.984 VCC– 0.644
0.750 VCC– 0.361
0.750 VCC– 0.350
0.750 VCC– 0.324
VOL
SIGNAL QUALITY ERROR TEST ENABLE CONTROL (SQE EN L)
Test Control Voltage
Test Disabled (Input High Voltage)(IIH = + 20
μ
A Max.)
Test Enabled (Input Low Voltage)(– 50
μ
A < IIL < –150
μ
A)
Vdc
VIH
VIL
2.0
0
–
–
5.0
0.8
FULL DUPLEX MODE SELECT (FULLD L)
Mode Select Control Voltage
Normal Operation (Input High)(IIH = + 20
μ
A)
Full Duplex (Input Low)(– 50
μ
A < IIH < –150
μ
A)
Vdc
VIH
VIL
2.0
0
–
–
5.0
0.8
LOOPBACK TEST MODE FUNCTION (LOOP L)
Test Control Voltage
Test Disabled (Input High)(IIH = + 20
μ
A)
Test Enabled (Input Low)(IIL = – 200
μ
A)
Vdc
VIH
VIL
2.0
0
–
–
5.0
0.8
LINK FAIL STATUS (LINKFL H)
Status Output Voltage (See Load Circuits: CMOS Load Circuit)
Maximum Voltage for Output Low Condition (IOL = 20 mA)
Output Low Sink Current
VOH
VOL
–
–
–
–
0.5
20
Vdc
mA
CLOCK OSCILLATOR
Clk+ Input Logic Threshold
High Level Input Voltage (IIH = +100
μ
A Max.)
Logic Low Input Voltage (IIL = –100
μ
A Max.)
Clk Out Output Voltage (See Load Circuits: CMOS Load Circuit)
Logic High (IOH = –12 mA)
Logic Low (Iout = +16
μ
A)
VIH
VIL
2.0
–
–
–
5.0
0.8
Vdc
μ
A
Vdc
VOH
VOL
3.7
–
3.9
0.25
–
0.5
Output Load Circuits
TTL/CMOS Load Circuit
6.0k
20 pF
ECL Load Circuit
330
15 pF
Differential Load Circuit
100
TX–
TX+
39 (1%)
39 (1%)
VOD
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